Article detail · 2010
An embedded 65 nm CMOS baseband IQ 48 MHz 1 GHz dual tuner for DOCSIS 3 0
- Year
- 2010
- ISSN
0163-6804- Type
- article
Data source split
- YÖKSİS YÖKSİS article record
- OpenAlex OpenAlex enrichment (abstract, citations, topics)
Abstract
English (OpenAlex)
An embedded CMOS digital dual tuner for DOCSIS 3.0 and set-top box applications is presented. The dual tuner down-converts a total of ten 6 MHz Annex B channels or eight 8 MHz Annex A channels, for a maximum data rate of 320 Mb/s in Annex B and 400 Mb/s in Annex A mode. The dual tuner exceeds all the stringent SCTE 40 specifications over the 48-1004 MHz bandwidth, without using any external components or SAW filters. Enabling technologies are a harmonic rejection front-end, a low-noise high-frequency resolution PLL, and digital image rejection. To our knowledge this is the first reported multichannel broadband tuner embedded in a DOCSIS 3.0 System on a chip implemented in 65 nm pure digital CMOS technology.
Topics
- Advancements in PLL and VCO Technologies
- Radio Frequency Integrated Circuit Design
- Photonic and Optical Devices
Primary topic Advancements in PLL and VCO Technologies